Engineering Skills

Digital and Simulator Design

• Performance evaluation of existing accelerators through C-based simulation, measuring computation, memory traffic, speedup, and energy against published baselines.
• RTL design of specialized functional units for SoC-based accelerators in Verilog, together with the surrounding compute and control logic.
• FPGA-level demonstration of designed accelerators, from synthesis and waveform bring-up to on-board functional validation.

Hardware Verification

• Functional verification of digital blocks with UVM and SystemVerilog, including testbench construction and coverage-driven simulation.
• Functional verification of digital blocks with JasperGold, using assertion- and property-based checks.

VLSI and Device Design

• Analog in-memory-computing circuit design built on emerging non-volatile memory devices.
• Compact modeling of emerging devices, capturing switching dynamics for circuit-level simulation.